The Logic Gate NAND 74HC00N is CMOS (Quadruple 2-Input Positive-NAND Gate). It is a 14 pin package that contains 4 individual NAND gates in it. with SN74HC00N we can make SR Flip Flop Circuit, which has four NAND gates inside. The IC power source has been limited to a MAXIMUM OF 6V
Below are the pin diagram and the corresponding description of the pins.
IC SN74HC00N Pin Diagram
SR Flip-flops were used in common applications like MP3 players, Home theatres, Portable audio docks, and etc. But nowadays JK and D flip-flops are used instead, due to versatility. SR latch can be built with the NAND gate or with the NOR gate. Either of them will have the input and output complemented to each other. Here we are using NAND gates for demonstrating the SR flip flop.
Whenever the clock signal is LOW, the inputs S and R are never going to affect the output. The clock has to be high for the inputs to get active. Thus, SR flip-flop is a controlled Bi-stable latch where the clock signal is the control signal. Again, this gets divided into positive edge-triggered SR flip flop and negative edge triggered SR flip-flop. Thus, the output has two stable states based on the inputs which have been discussed below.
The truth table of SR Flip-Flop:
The memory size of the SR flip flop is one bit. The S (Set) and R (Reset) is the input states for the SR flip-flop. The Q and Q’ represents the output states of the flip-flop. According to the table, based on the inputs, the output changes its state. But, the important thing to consider is all these can occur only in the presence of the clock signal.
We are constructing the SR flip flop using NAND gate which is as below,
SR Flip-Flop Connection Diagram
Pin description of IC SN74HC00N
Here we have used IC SN74HC00N for demonstrating SR Flip Flop Circuit, which has four NAND gates inside. The IC power source has been limited to MAXIMUM OF 6V and the data is available in the datasheet. Below snapshot shows it.
Hence, we have used an LM7805 regulator to limit the supply voltage and pin voltage to 5V maximum.
The two buttons S (Set) and R (Reset) are the input states for the SR flip-flop. The two LEDs Q and Q’ represents the output states of the flip-flop. The 9V battery acts as the input to the voltage regulator LM7805. Hence, the regulated 5V output is used as the Vcc and pin supply to the IC. Thus, for different input at S’ and R,’ the corresponding output can be seen through LED Q and Q’.
The truth table and corresponding states vary according to the type of construction which can be either using NAND gates or NOR gates. Here, it is done using NAND gates. The pins S’ and R’ are normally pulled down. Hence, the default input state will be S’=0, R’=0.
Below we have described all four states of SR Flip-Flop using SR flip flop circuit made on a breadboard.
State 1: Clock – HIGH ; S’ – 0 ; R’ – 0 ; Q – 0 ; Q’ – 0
For the State 1 inputs, the RED led glows indicating the Q’ to be HIGH and GREEN led shows Q to be LOW.